demonstrates SYNC_2V mode with AO32CPCI. More...

#include "local.h"
#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include <errno.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <sys/mman.h>
#include <sys/stat.h>
#include <sys/time.h>
#include <sys/types.h>
#include <unistd.h>
#include <popt.h>
#include "acq32ioctl.h"
#include "acq32busprot.h"
#include "llif.h"
#include "llprotocol.h"
#include "llcontrol.h"
#include "x86timer.h"
#include "llcontrol-core.h"

Defines
#define	FLAVOR "ACQ196"
#define	SAMPLE_SIZE (96*2)
#define	BAR_FIFO 3
#define	EACHBBB (dac_buf[icard].bbb)
#define	EACHDAC_BASE (EACHBBB + LLCV2_AO_HSBS)
#define	EACHDAC_BASE16 ((u16*)EACHDAC_BASE)
#define	BASE_AO32(ic) ((u32*)EACHDAC_BASE+INDEX_OF_LLC_SYNC2V_AO32(ic))
#define	V2SETDACS(src, icard) memcpy(EACHDAC_BASE, (src)+(icard)*32, DAC_SAMPLE_SIZE)
#define	OFFSET 0
Functions
static void	sync_2v_updateTstats (u32 cmd, struct Card card, struct TimingStats tstats)
	updates timing stats from embedded host buffer data
static u32	card_sync_2v_WaitDmaDone (struct Card *card)
static u32	getSlavePa (int slot)
static void	setSlaveData (u32 aovec, void src)
	create some data for AO32CPCI.
void	appEnterLLC_SYNC_2VAO32 (int icard, struct MU mu, struct TestDescription td)
	set up LLCV2_INIT buffer and enter mode.
int	runSYNC_2VAO32 (struct TestDescription *td, int soft_clock)
	runs the test SYNC_2V mode.

Detailed Description

demonstrates SYNC_2V mode with AO32CPCI.

llcontrol [opts] --dacs aoramps -W SYNC2V_AO32 ECM slave1 [..slaveN]
- aoramps is a simple binary ramp file provided as an example
- generates a "walking bit" pattern on DO64
- slave1 : slot # of first slave
- supports up to MAXAO32 (6) slaves

ao32cpci: x86 host driver must have been preloaded.
- the driver enumerates the PCI bus - remember, although ACQ196 is doing most of the data moving on the PCI bus, HOST is still the system slot card.
- driver enables all the AO32CPCI slave cards
- driver exposes the bus addresses of the slave cards.
- LLCONTROL loads the slave bus addresses and communicates them to ACQ196

Definition in file llcontrol-sync2VAO32-core.c.

Define Documentation

#define BAR_FIFO 3

Definition at line 113 of file llcontrol-sync2VAO32-core.c.

Referenced by getSlavePa().

#define BASE_AO32 ( ic ) ((u32*)EACHDAC_BASE+INDEX_OF_LLC_SYNC2V_AO32(ic))

Referenced by runSYNC_2VAO32().

#define EACHBBB (dac_buf[icard].bbb)

#define EACHDAC_BASE (EACHBBB + LLCV2_AO_HSBS)

#define EACHDAC_BASE16 ((u16*)EACHDAC_BASE)

#define FLAVOR "ACQ196"

Definition at line 78 of file llcontrol-sync2VAO32-core.c.

#define OFFSET 0

#define SAMPLE_SIZE (96*2)

#define V2SETDACS	(	src,
		icard
	)		memcpy(EACHDAC_BASE, (src)+(icard)*32, DAC_SAMPLE_SIZE)

Function Documentation

void appEnterLLC_SYNC_2VAO32	(	int	icard,
		struct MU *	mu,
		struct TestDescription *	td
	)

set up LLCV2_INIT buffer and enter mode.

Buffer set up as 4K block at offset 0

Todo:

this overwrites settings from initV2Stats(), initV2Stats is therefore redundant.

set up for single 4K buffer

uses V2 synchronization

Definition at line 168 of file llcontrol-sync2VAO32-core.c.

References TestDescription::ao32_count, TestDescription::ao32_ids, TestDescription::arg, BP_FC_SET_LLCV2_INIT, TestDescription::cards, TestDescription::channels, TestDescription::clkpos, TestDescription::ARG::divisor, EACHBUF, enterLLC_SYNC_ECM(), getBusAddr(), getSlavePa(), getVaddr(), TestDescription::internal_loopback, LLCV2_AI_HSBT, llcv2_hb_offset, LLCV2_INIT_AO32PA0, MASTER, PRINTF, short, Card::sync_2v_offset_status_hsbt, Card::tlatch, TestDescription::trpos, updateTstats, and waitDmaDone.

Referenced by runTest().

static u32 card_sync_2v_WaitDmaDone ( struct Card * card ) [static]

Definition at line 93 of file llcontrol-sync2VAO32-core.c.

References Card::buf, getVaddr(), llv2WaitDmaDone_2v(), Card::mbx, Card::sync_2v_offset_status_hsbt, and Card::tlatch.

static u32 getSlavePa ( int slot ) [static]

Definition at line 115 of file llcontrol-sync2VAO32-core.c.

References BAR_FIFO, fclose(), fname, and len.

Referenced by appEnterLLC_SYNC_2VAO32().

int runSYNC_2VAO32	(	struct TestDescription *	td,
		int	soft_clock
	)

runs the test SYNC_2V mode.

PSEUDO-CODE:

(1) Clear the latch timer
(2) Set a local memory target address and arm the capture
(3) Poll for counter running (hardware counter starts on external gate)
(4) Iterate for required number of samples:
(5) [optionally send a soft clock command] trigger an acquisition
(6) Wait for DMA Done - at this point data is available in target mem. A "real" control application is probably getting most of its calcs done here rather than simply polling
(7) [Get the latch (sample) and current uSec counters from the boards - only if interested]
(8) Check the process has not stopped (external gate high)
(b) write data to host side buffer(LLCV2_AO_HSBS)
(b.1) take the incoming value on feedback_channel and propagate to all DACS. default is to assume HAWG on DAC0 (so feedback_channel better be 0 !), but td->update_dacs makes a better test. NB: Feedback is on RTMAO, not AO32CPCI
(b.15) special case where we are DRIVING the initial DAC signal from host side.
(b.2) simple feedforward case - just drive all DACS from AWG pattern.